Systems perspective
From microarchitecture to hyperscale inference.
Raj has more than 15 years across AI accelerator architecture, hyperscale inference, silicon-software co-design, telemetry, memory systems and infrastructure economics. His work spans production systems at Meta, Microsoft, d-Matrix and Cadence, alongside founder and advisory work across AI infrastructure.
Meta · ML ASIC Architect & TLMPerformance modeling, telemetry correlation, workload characterization and system architecture for custom inference silicon.
d-Matrix · Chief AI ArchitectDigital in-memory compute architecture, silicon-software co-design and accelerator roadmap development.
Microsoft · Senior ML Performance ArchitectMaia and Brainwave system modeling, workload partitioning and optimized inference kernels.
Cadence Tensilica · Senior Principal EngineerAI processor architecture, performance simulation and hardware-aware optimization.
University of Rochester · Ph.D.Computer architecture research, peer-reviewed publications and award-winning systems work.
Engagement areas
AI silicon strategyArchitecture, roadmaps, workload fit and competitive positioning.
Inference systemsPerformance, memory, telemetry, scheduling and economics.
Hyperscale infrastructureRacks, networking, power, cooling and deployment decisions.
Technical diligenceVendor assessment, market landscapes and expert workshops.
Experience map
One career across the complete stack.
CPU architectureMIPS
AI processor IPCadence
Cloud acceleratorMicrosoft
Inference ASICd-Matrix + Meta
AI infrastructureChip to campus
15+Years
4Major platforms
Chip → CampusCoverage
HW + SWCo-design
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